1. Technical Field of the Invention
The present invention relates to the field of voltage regulators and in particular to regulators with a low drop-out.
2. Description of the Related Art
A low drop-out regulator made in an integrated circuit may be used to provide a predetermined voltage with low noise to a set of electronic circuits from a supply voltage provided by a rechargeable battery. Such a supply voltage decreases in time and is likely to include noise caused by neighboring electromagnetic radiations on the battery-to-regulator connections. The regulator is said to have a low drop-out since it enables providing a voltage close to the supply voltage.
FIG. 1 schematically shows an example of a conventional low drop-out regulator 2. The regulator includes an output terminal S intended for being connected to a load R. Load R, essentially resistive, represents the sum of the input impedances of the circuits supplied by the regulator. For simplicity, it is considered hereafter that load R is a resistor. The regulator includes an operational amplifier 4 having a non-inverting input IN+ connected to a positive reference voltage Vref and having an inverting input IN− connected to the terminal S by a feedback loop. Voltage Vref is generated in a known manner by a constant voltage source (not shown) with a high output impedance. Operational amplifier 4 is supplied between a positive supply voltage Vbat provided by the battery and a ground voltage GND. An inverting stage 6, supplied between voltages Vbat and GND, receives the output of operational amplifier 4 and its output is connected to the gate of a P-channel MOS power transistor T1 having its drain connected to output terminal S and its source connected to voltage Vbat. Transistor T1 is of MOS type rather than bipolar, especially to minimize the difference between output voltage Vout of terminal S and supply voltage Vbat. A charge capacitor C is arranged between output terminal S and voltage GND.
FIG. 2 schematically shows an example of forming of operational amplifier 4 of FIG. 1. Two P-channel MOS transistors T2, T3 have their sources connected to each other and their gates respectively connected to inputs IN− and IN+. A bias current source CS1 is arranged between voltage Vbat and the sources of transistors T2 and T3. Transistors T2 and T3 form a differential pair. Two N-channel MOS transistors T4 and T5 have their sources connected to voltage GND and their gates connected to each other. The drains of transistors T4 and T5 are respectively connected to the drains of transistors T2 and T3. The drain of transistor T3 is connected to the gates of transistors T4 and T5. Transistors T4 and T5 form an active load of the differential pair formed by transistors T2 and T3. The drain of transistor T2 forms the output of amplifier 4.
A voltage regulator of FIG. 1 maintains voltage Vout of output terminal S to a value equal to reference voltage Vref. Any variation in voltage Vbat translates as a variation in voltage Vout, which is transmitted by the feedback loop on input IN−. When the regulator operates properly, the variation in the voltage of input IN− causes the return of voltage Vout to voltage Vref. For this purpose, the regulator circuit, which forms a looped system between input IN− and terminal S must be a stable system. For this system to be stable when looped, its open-loop gain must not exceed 1 when the phase shift is smaller than −180° (when there is a phase opposition between the system input and output).
FIG. 3 illustrates, according to frequency f, the variation of gain G and of phase shift φ of the open-loop regulator taken between input IN− and terminal S. For low frequencies f, gain G is equal to static gain Gs of the open-loop regulator. The elements forming the regulator each have a gain which varies according to frequency. The cut-off frequency of an element having a gain that decreases when the frequency increases forms a “pole” of the transfer function of the open-loop regulator. Each pole of the transfer function of the open-loop regulator introduces a drop of 20 dB per decade in gain G. Further, each pole of the transfer function of the open-loop regulator introduces a phase shift φ of 90°. For simplicity, it is considered hereafter that the transfer function of the open-loop regulator only includes one main pole P0 and one secondary pole P1. The frequency of main pole P0 especially depends on the inverse of the product of charge resistance R and of capacitance C. The frequency of secondary pole P1 especially depends on the gate impedance of transistor T1. It is considered that inverter stage 6 is an ideal stage that introduces no pole. The features of the elements forming the regulator are chosen in such a way that when phase shift φ becomes equal to −180°, gain G is smaller than the unity gain (0 dB). In FIG. 3, pole P0 is at a rather low frequency and pole P1 is at a frequency greater than the frequency of pole P0. For a frequency smaller than the frequency of pole P0, the gain is equal to static gain Gs of the open-loop regulator. Between poles P0 and P1, the gain drops by 20 decibels per decade. Beyond pole P1, the gain drops by 40 decibels per decade. The phase shift drops from 0 to −90° at pole P0 and from −90° to −180° at pole P1. Static gain Gs of the regulator is equal to Gs4*Gs6*Gs1, where Gs4 is the static gain of operational amplifier 4, Gs6 is the static gain of inverter stage 6, and Gs1 is the static gain of transistor T1. The static gain of operational amplifier 4 has the following form:Gs4=Gm2*(R2*R4)/(R2+R4)=Gm2*Zoutwhere Gm2 is the transconductance of transistor T2, and R2, R4 are the on-state resistances, called the Early resistances, of transistors T2 and T4. Ratio (R2*R4)/(R2+R4) is output impedance Zout of the operational amplifier.
The Early resistances of transistors T2 and T4 are high, and output impedance Zout and static gain Gs4 of amplifier 4 have a high value. A strong gain Gs4 makes static gain Gs high, which shifts the gain curve upwards and makes the regulator stability difficult to obtain.
With the improvement of technologies, the features of an operational amplifier improve and its gain Gs4 especially tends to increase.
FIG. 3 illustrates a gain curve G′ of an open-loop regulator having the two preceding poles P0, P1 and having a static gain Gs′ greater than the preceding static gain Gs. Gain G′ is greater than 1 (0 dB) when phase shift φ reaches value −180°, which makes the regulator unstable.
A conventional way to solve this problem consists of increasing the capacitance of capacitor C, which reduces the frequency of main pole P0. However, the use of a capacitor C of large dimension is not desirable. Further, it is not desirable to debase the characteristics of the transistors of an operational amplifier, given that these transistors must preferably be identical to the other transistors in the integrated circuit containing the regulator.